JPH0326864B2 - - Google Patents

Info

Publication number
JPH0326864B2
JPH0326864B2 JP59167481A JP16748184A JPH0326864B2 JP H0326864 B2 JPH0326864 B2 JP H0326864B2 JP 59167481 A JP59167481 A JP 59167481A JP 16748184 A JP16748184 A JP 16748184A JP H0326864 B2 JPH0326864 B2 JP H0326864B2
Authority
JP
Japan
Prior art keywords
input
address
cpu
output devices
memory means
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59167481A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6145347A (ja
Inventor
Junichi Iwasaki
Akira Kuwata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP59167481A priority Critical patent/JPS6145347A/ja
Priority to US06/764,918 priority patent/US4760524A/en
Priority to DE8585110114T priority patent/DE3586789T2/de
Priority to EP85110114A priority patent/EP0172523B1/en
Publication of JPS6145347A publication Critical patent/JPS6145347A/ja
Publication of JPH0326864B2 publication Critical patent/JPH0326864B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G06F12/0661—Configuration or reconfiguration with centralised address assignment and decentralised selection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
JP59167481A 1984-08-10 1984-08-10 マイクロコンピユ−タ Granted JPS6145347A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP59167481A JPS6145347A (ja) 1984-08-10 1984-08-10 マイクロコンピユ−タ
US06/764,918 US4760524A (en) 1984-08-10 1985-08-12 Microcomputer having at least one input-output unit
DE8585110114T DE3586789T2 (de) 1984-08-10 1985-08-12 Mikrocomputer mit wenigstens einer ein-/ausgabeeinheit.
EP85110114A EP0172523B1 (en) 1984-08-10 1985-08-12 Microcomputer having at least one input-output unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59167481A JPS6145347A (ja) 1984-08-10 1984-08-10 マイクロコンピユ−タ

Publications (2)

Publication Number Publication Date
JPS6145347A JPS6145347A (ja) 1986-03-05
JPH0326864B2 true JPH0326864B2 (en]) 1991-04-12

Family

ID=15850478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59167481A Granted JPS6145347A (ja) 1984-08-10 1984-08-10 マイクロコンピユ−タ

Country Status (4)

Country Link
US (1) US4760524A (en])
EP (1) EP0172523B1 (en])
JP (1) JPS6145347A (en])
DE (1) DE3586789T2 (en])

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4847750A (en) * 1986-02-13 1989-07-11 Intelligent Instrumentation, Inc. Peripheral DMA controller for data acquisition system
KR930008050B1 (ko) * 1990-02-16 1993-08-25 가부시끼가이샤 히다찌세이사꾸쇼 원칩 마이크로프로세서 및 그 버스시스템
EP0602276A1 (de) * 1992-12-18 1994-06-22 Siemens Nixdorf Informationssysteme Aktiengesellschaft Programmierbare Adre dekoder
US5535417A (en) * 1993-09-27 1996-07-09 Hitachi America, Inc. On-chip DMA controller with host computer interface employing boot sequencing and address generation schemes
US5513374A (en) * 1993-09-27 1996-04-30 Hitachi America, Inc. On-chip interface and DMA controller with interrupt functions for digital signal processor
JPH0922394A (ja) * 1995-07-05 1997-01-21 Rohm Co Ltd 制御装置
US8149901B2 (en) * 2005-05-27 2012-04-03 Verigy (Singapore) Pte. Ltd. Channel switching circuit
JP4931195B2 (ja) * 2006-07-27 2012-05-16 大成化工株式会社 定量取り出し装置及び定量取り出し装置付き容器

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4378589A (en) * 1976-12-27 1983-03-29 International Business Machines Corporation Undirectional looped bus microcomputer architecture
US4188670A (en) * 1978-01-11 1980-02-12 Mcdonnell Douglas Corporation Associative interconnection circuit
US4276594A (en) * 1978-01-27 1981-06-30 Gould Inc. Modicon Division Digital computer with multi-processor capability utilizing intelligent composite memory and input/output modules and method for performing the same
AT355354B (de) * 1978-08-29 1980-02-25 Schrack Elektrizitaets Ag E Schaltungsanordnung mit einer zentraleinheit, an die mehrere peripheriegeraete angeschlossen sind
US4373181A (en) * 1980-07-30 1983-02-08 Chisholm Douglas R Dynamic device address assignment mechanism for a data processing system
US4402042A (en) * 1980-11-24 1983-08-30 Texas Instruments Incorporated Microprocessor system with instruction pre-fetch
JPS5930139A (ja) * 1982-08-10 1984-02-17 Mitsubishi Electric Corp ビツトパタ−ン比較装置
US4480315A (en) * 1982-08-16 1984-10-30 Fairchild Camera & Instrument Corp. Dynamically controllable addressing in automatic test equipment
JPS5966728A (ja) * 1982-10-08 1984-04-16 Hitachi Micro Comput Eng Ltd マイクロコンピユ−タシステムのアドレスデコ−ド回路
US4649471A (en) * 1983-03-01 1987-03-10 Thomson Components-Mostek Corporation Address-controlled automatic bus arbitration and address modification

Also Published As

Publication number Publication date
DE3586789D1 (de) 1992-12-10
DE3586789T2 (de) 1993-05-27
EP0172523A2 (en) 1986-02-26
US4760524A (en) 1988-07-26
EP0172523A3 (en) 1989-02-22
JPS6145347A (ja) 1986-03-05
EP0172523B1 (en) 1992-11-04

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term